System-on-a-chip (SoC) functional verification involves integrating multiple intellectual property (IP) blocks. Accordingly, understanding how to define, measure, correlate, and analyze appropriate IP ...

The need to improve functional verification productivity and quality continues to grow. The 2004/2002 IC/ASIC Functional Verification Study, by Collett International Research, shows that logic or ...

FPGA engineers are all doing functional verification using manual processes but growing system comlexity is the issue. Changing tools and methodologies may seem daunting, but there is a way to break ...

Functional safety is becoming a key part of chip design, and an increasingly problematic one for many engineering teams. Functional safety for electrical and electronic systems is nothing new. It has ...

Autonomous vehicles (AVs) will be the culmination of dozens of highly complex systems, incorporating state-of-the-art technologies in electronics hardware, sensors, software, and more. Conceiving and ...

If you don’t measure something you certainly can’t improve it in any meaningful way. This is especially important with a process that can never be completed due to the sheer magnitude of the ...

This paper discusses the functional verification of IP cores and problems which arise during their implemenation in today’s advanced applications. First, the usual approach to functional ...

In the past five years, few topics have received more attention in the trade press than design reuse. As system-on-chip (SoC) devices increase in complexity, resources become more scarce and market ...

Functional verification of chip designs is a hefty topic, so it's only appropriate that it should be the subject of a hefty tome. In fact, it's almost remarkable that the authors of Comprehensive ...